The metal-oxide-semiconductor field-effect transistor (MOSFET) technology, which forms the basic component of current integrated circuits, is reaching deep levels of miniaturization. The scaling occurs both for the geometrical dimensions as for the operating voltages, as this leads to better performance with a reduced footprint (reduced area on the chip stemming from dimension scaling) as well as reduction in power consumption per component (stemming from the voltage scaling). However, secondary effects of this miniaturization are noticeable. While scaling of geometrical dimensions is being continued, scaling of operating voltage is saturating, with leakage currents and heating issues being difficult to solve.
As a result of increasing leakage currents when scaling the supply voltage, the supply voltage is saturating and geometrical dimensions are currently being scaled faster than the supply voltage. This leads to an increase in short-channel effects, as the electric fields present in the devices become larger. Power density increases as well, increasing the demands on cooling.
The tunnel field-effect transistor (TFET) is a novel transistor concept intended to deliver improved performance at a lower supply voltage than a MOSFET, as a result of its capability of reaching sub-60 mV/dec subthreshold swing (SS). While the minimum voltage window to switch a transistor from OFF to ON state (subthreshold swing SS) has a theoretical limit of approximately 60 mV/dec at room temperature, the modern tunnel field-effect transistor (TFET) is capable of reaching sub-60 mV/dec SS values. In case of MOSFETs, the SS is impossible to reduce under 60 mV/dec, even assuming infinite gate-oxide capacitance, because the swing depends on the thermal energy in MOSFETs. This also limits the lower voltage of operation, rendering the MOSFET as sub-optimal for some low-power applications. The architecture and mode of operation of transistors have changed to other type of field-effects, e.g. the tunnel field-effect (TFE), to overcome this limit. While the basic doping profile of a MOSFET is, in general, “n i n”, the basic profile of tunnel field-effect transistors (TFETs) is “n i p” or “p i n”. Reaching sub-60 mV/dec SS is possible thanks to the TFET's working principle, which is based on band-to-band tunneling (BTBT), instead of on drift and diffusion like a MOSFET. Hence, the tunneling effect is the property which determines whether a transistor allows or prevents current from flowing. In a TFET, the charge carrier tunnels from the source to the channel region. The exponential tail of the Fermi-Dirac distribution of the carriers, responsible for the 60 mV/dec SS limit in a MOSFET, is cut off by the bandgap of the source material.
Of course, an effective and predictable tunneling is needed in order to obtain TFETs at least as reliable as their MOSFET counterparts. The challenge in case of TFETs is how to obtain a steep SS and a high on-current (ION).
TFETs, both n-type and p-type, have been verified experimentally, both in Si and III-V materials, but the SS and on-currents which are obtained today are insufficient, and the current models do not allow for an optimization of both parameters simultaneously. One of the ways that are being pursued to boost the on-current and decrease SS, is by the insertion of a counterdoped pocket next to the source region. This configuration is called a n-p-i-p or p-n-i-n TFET, for respectively the p-type and n-type transistor. The counterdoped pocket increases the electric field at the tunnel junction, resulting in more efficient tunneling and hence a larger on-current, combined with lower SS.
Despite the advances towards TFETs with high on-current and low subthreshold swing, integrated circuits for logic and memory applications comprising TFET are still sub-optimal because such transistors do not present good complementarity. Complementarity is needed to obtain a sufficiently low static power consumption. While TFETs with n-doped drains (n-TFETs) can reach a high on-current and good subthreshold swing, TFETs with p-doped drain (p-TFETs) present worse characteristics, even in the n-p-i-p configuration.
In order to obtain an effective tunneling, high on-current and low SS, the source and drain should be highly doped, thus increasing the electric field. A problem arising from a high doping level is an increase of degeneration level, which makes the semiconductor of the source act as a conductor rather than as a semiconductor. Among other problems, it has been shown that subthreshold swing is affected negatively by source degeneration. There have been solutions to provide effective tunneling, for example confinement by reducing the thickness of the transistors. The energetic distance between the conduction band edge and the electron Fermi level (EFN) in the source can be somewhat reduced by this process. This method is sub-optimal and further improvement is desirable.
Other possibilities include heterostructures in the manufacture of TFETs. The heterojunction is usually the junction in which tunneling takes place (tunnel junction). By doing this, there is more optimization of the band structure and effective bandgap possible. For instance, the source may comprise a material with large bandgap, which typically implies a large density of states (DOS), and hence including a heterostructure may improve subthreshold swing. For the second material of the junction, also a large-bandgap material can be chosen. The effective bandgap, which is the energetic distance from valence band in the first material to the conduction band in the second material (n-TFET) or vice-versa for p-TFET, should be very small, so the materials must be carefully chosen for improving on-current over homogeneous junctions. The disadvantages of this technique are that the fabrication of these heterojunctions is complex, and the junction usually presents a relatively high density of stacking faults, dislocations and voids, due to the differences in material composition and, in some materials, also differences in crystal cell size for the different crystals structures. These faults tend to increase the off-current of the device, introduce new trap states, and even may change the band alignment, possibly leading to an increase in tunneling distance. Despite the possibility to use high DOS materials in the heterostructure, the DOS in the conduction band of typical III-V direct bandgap materials is still low, and degeneracy will occur at high doping regardless of defects and dislocation.
Hence, a different approach is needed.